Wedig Consulting






  1. Wedig, R. G., "Dynamic Detection of Concurrency in DO-Loops Using Ordering Matrices", Technical Report 209, Stanford University, May 1981.
     
  2. Wedig, R. G., A "Phenomenal" Chip for Toy Design, VLSI Design, Vol. 2, No. 3, 1981, pp. 51-52
     
  3. Wedig, R. G., "Dynamic Detection of Concurrency in DEL Instruction Streams", Technical Report 231, Stanford University, February 1982.
     
  4. Detection of Concurrency in Directly Executed Language Instruction Streams, Ph.D. dissertation, Stanford University, June 1982.
     
  5. Wedig, R. G. and Flynn, M. J., "Concurrency Detection in Language-Oriented Processing Systems", Proceedings of the 3rd International Conference on Distributed Computing Systems, IEEE, October 1982, pp. 805-810.
     
  6. With Flynn, M. J., Huck, J. C. and Wakefield, S. P., "Performance Evaluation of Execution Aspects of Computer Architectures", Proceedings of the International Workshop on High Level Language Computer Architectures, University of Maryland and the Office of Naval Research, December 1982.
     
  7. Wedig, R. G., "The Detection of Concurrency Using Structured Control Flow", Proceedings of the International Workshop on Computer Systems Organization, IEEE Computer Society, March 1983, pp. 28-35.
     
  8. Wedig, R. G., "A Language-Oriented Approach for Implementing Branches: Structured Control Flow", Proceedings of the International Workshop on High-Level Computer Architecture, University of Maryland, May 1984, pp. 3.1-3.7.
     
  9. Wedig, R. G. and Rose, M. A., "The Reduction of Branch Instruction Execution Overhead Using Structured Control Flow", Proceedings of the 11th Annual International Symposium on Computer Architecture, IEEE Computer Society, June 1984, pp. 119-125.
     
  10. Wedig, R. G., "Using ISPS to Teach Computer Architecture", Proceedings of the National Educational Computing Conference, ACM, June 1984.
     
  11. With Forgy, C., Gupta, A. and Newell, A., "Initial Assessment of Architectures for Production Systems", Proceedings of the National Conference on Artificial Intelligence, AAAI, August 1984.
     
  12. Wedig, Robert G. and Lehr, Theodore F., "The GaAs Implementation of a Production System Machine", Proceedings of the 19th Annual Hawaii International Conference on System Sciences, IEEE Computer Society, January 1986.
     
  13. With Anoop Gupta and Charles Forgy, "Parallel Algorithms and Architectures for Rule-Based Systems", Proceedings of the 13th Annual International Conference on Computer Architecture, IEEE, June 1986.
     
  14. With Augustus K. Uht, "Hardware Extraction of Low-Level Concurrency from Serial Instruction Streams", Proceedings of the 15th Annual International Conference on Parallel Processing, ACM, August 1986.
     
  15. Wedig, Robert G., Software and Hardware Techniques for Stack Management, Proceedings of the 20th Annual Hawaii International Conference on System Sciences, IEEE Computer Society, January 1987.
     
  16. With Theodore F. Lehr, "The GaAs Implementation of a Production System Machine, IEEE Computer, April 1987.
     
  17. With Timothy Stanley, "A Performance Analysis of Automatically Managed Top of Stack Buffers", Proceedings of the 14th Annual International Conference on Computer Architecture, IEEE, June 1987.
     
  18. Wedig, R. G., High Level Language Computer Architectures, Elsevier Science, New York, NY, 1988, chapter 6.

1516 Cormorant Ct., Sunnyvale, CA 94087 • Tel: (408) 735-9321 • Fax: (408) 735-0408 • Bob@Wedig.com